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IP Verification #VLSI
Functional Area : IT
Job Type : Permanent
Experience : 3 Years+
Location : Bangalore,Chennai,Hyderabad,Noida,Pune
Notice Period : 60 days
Education : BE
- Good understanding of ASIC/SoC life cycle
- Define ASIC/SoC verification strategy
- Full chip testplan development
- Full chip TB Architecture definition
- UVM based testbench development
- SV functional coverage, Assertions coding
- Test case development, coding, execution, bug analysis
- Regressions, coverage analysis
- Own/participate in verification closure
- Has participated in multiple ASIC/SoC verification till tapeout stage
- Experience writing ASIC/SoC testplans
- Experience in ASIC/SoC Testbench definition
- Expertise & hands-on experience in OVM/UVM methodologies using SV
- Experience in developing TB components, including functional coverage implementation and assertion coding
- Experience in Gate level simulation & netlist debugging
Experience in Perl/Shell scripting
Send resume & specify position you are seeking to :
Email Id: angel@adso.com
Mobile: 9502966255
AdvanSoft International,Inc.
Dr No. 8-2-293/82/f/c/30,
Film Nagar, Jubilee Hills,
Hyderabad - 500 096.
