Physical Design #VLSI Apply Now

Synthesis using DC

·         Floorplan, P&R

·         Physical verification (DRC, LVS)

·         STA & Timing closure

·         LEC

·         Layout clean-up

·         Expert in Synthesis to Tape-out flow, including Layout, DFT, Timing Closure, and Chip Finishing

·         Ability to independently handle complex blocks to closure right from Synthesis

·         Ability to communicate with architecture, RTL design and other remote teams

·         Excellent verbal and written communication skills

·         Preferably experience in 20 nm, 14 nm flows

·         Performing a wide range of back-end activities, including synthesis of RTL, DFT insertion, power optimization, Floor-planning, PnR (Place and Route), Clock Tree Synthesis (CTS), Timing closure (STA), DRC, LVS, Antenna checks, IR drop (RedHawk), multi voltage checks etc.

·         Participating in the development of a back-end ASIC design flow.

·         Expertise in Synopsys suite (IC Compiler, Primetime, Design Compiler)

·         Experience of UPF low power design through synthesis, place and route.

Send resume & specify position you are seeking to :

Email Id: angel@adso.com

Mobile: 9502966255

AdvanSoft International,Inc.

Dr No. 8-2-293/82/f/c/30,
Film Nagar, Jubilee Hills,
Hyderabad - 500 096.